A 700 Mb/s BiCMOS read channel integrated circuit

Abstract

A read channel IC achieves >1.5 dB SNR improvement over a 32/34 rate EPRML read channel at 2.8 user bit density. The 0.18 /spl mu/m BiCMOS chip operates up to 700 Mb/s with 1.8 W read mode power using 3.3 V analog and 1.8 V digital power supplies. The die area is 9.64 mm/sup 2/.