Publication | Open Access
Designing asynchronous circuits from behavioural specifications with internal conflicts
24
Citations
13
References
2002
Year
Unknown Venue
Petri NetEvent-driven ArchitectureEngineeringVerificationComputer ArchitectureAnalogue ComponentsSystem SynthesisConcurrent SystemPetri Net LevelFormal VerificationInternal ConflictsSystems EngineeringAsynchronous Vlsi DesignAsynchronous CircuitsComputer EngineeringComputer ScienceLogic SynthesisDiscrete Event SystemSystematic MethodConcurrency TheoryFormal Methods
The paper presents a systematic method for synthesizing asynchronous circuits from event-based specifications with conflicts on output signals. It describes a set of semantic-preserving transformations performed at the Petri net level, which introduce auxiliary signal transitions implemented by internally analogue components, Mutual Exclusion (ME) elements. The logic for primary outputs can therefore be realized free from hazards and external meta-stability. The technique draws upon the use of standard logic components and two-input MEs, available in a typical design library.
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