A Low-Cost Very Large Scale Integration Architecture for Multistandard Inverse Transform

Abstract

In this brief, a low-cost very large scale integration (VLSI) architecture is designed for multistandard inverse transform. The proposed architecture is used in multistandard decoder of MPEG-2, MPEG-4 ASP, H.264/AVC and VC-1. Two circuit share strategies, factor share (FS) and adder share (AS), are applied to the inverse transform architecture for saving its circuit resource. It is shown that the proposed multistandard inverse transform architecture can support the real-time decoding of 1920 <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$\times$</tex></formula> 1080@60 Hz high-definition video at the cost of low circuit resource.