IEEE Journal of Solid-State Circuits · 2000 · 78 citations · 11 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsSemiconductor DevicesSystem-on-chip DesignChip PackagingCmos Circuit DesignDigital Integrated CircuitsIntegrated Circuit DesignIntegrated Circuit DevicesMixed-signal Integrated Circuit DesignAutomatic Gain ControlDie DesignGain ControlJitterPhase-locked Loop ReceiversPseudorandom GeneratorsRadio-frequency Integrated Circuit DesignSilicon
A silicon germanium (SiGe) receiver IC is presented here which integrates most of the 10-Gb/s SONET receiver functions. The receiver combines an automatic gain control and clock and data recovery circuit (CDR) with a binary-type phase-locked loop, 1:8 demultiplexer, and a 2/sup 7/-1 pseudorandom bit sequence generator for self-testing. This work demonstrates a higher level of integration compared to other silicon designs as well as a CDR with SONET-compliant jitter characteristics. The receiver has a die size of 4.5/spl times/4.5 mm2 and consumes 4.5 W from -5 V.
11
Clock recovery from random binary signals
John Alexander · Electronics Letters · 1975 · 309 citations
Engineering, Computer Engineering, Electrical Engineering +16
A self correcting clock recovery curcuit
C. Hogge · Journal of Lightwave Technology · 1985 · 251 citations
Engineering, Computer Engineering, Electrical Engineering +13
J. A. Betts · Electronics and Power · 1975 · 198 citations