Evaluation of SCR-Based ESD Protection Devices in 90nm and 65nm CMOS Technologies

Abstract

The authors compare a number of promising SCR-based ESD protection devices in 90nm and 65nm CMOS technologies implemented with a consistent layout. The devices are evaluated using ESD metrics such as trigger voltage and current, on-resistance, failure current, turn-on time and DC leakage current. The authors also report that SCR turn-on time is highly dependent on the amplitude of the applied pulse.