A regular representation for mapping to fine-grain, locally-connected FPGAs

Abstract

A new data structure Pseudo-Symmetric Binary Decision Diagrams (PSBDDs) for completely specified Boolean functions has been proposed. The new diagrams are based on Ordered Binary Decision Diagrams and contact symmetric networks. The main advantages of the PSBBDs are the regular structure and predictable delay of the interconnects. These structures are especially well suited for mapping to fine-grain, locally-connected FPGAs where a very restricted routing domain limits circuit performance, for and submicron technologies.