Analog VLSI implementation of neural networks

Abstract

The potentialities of CMOS analog VLSI for the implementation of neural systems are demonstrated. It is shown how the various modes of operation of the transistor can be exploited to build very efficient neurons on a very small area with very low power consumption. The connectivity problem can be alleviated by selecting appropriate architectures. Various methods for implementing analog synaptic memories are discussed, and examples of working chips are given.< <ETX xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">&gt;</ETX>