A Novel 600V-LDMOS with HV-Interconnection for HVIC on Thick SOI

Abstract

A novel LDMOS structure with the HV-interconnection for a 600V-HVIC on thick SOI is proposed. There are two original points in the proposed structure. One is the formation of the double floating p-layers under the HV-interconnection to prevent potential distribution in the drift from disturbing due to the HV-interconnection, and the other is a good combination between the LDMOS structure and multiple trench isolation to obtain the isolation performance over 600V. From the proposed structure the high blocking capability of the LDMOS, including both off- and on-breakdown voltages over 600V and high hot carrier instability, and the isolation performance over 1200V can be obtained successfully. This paper will show numerical and experimental results in detail.