Publication | Open Access
NoC synthesis flow for customized domain specific multiprocessor systems-on-chip
563
Citations
46
References
2005
Year
Hardware SecuritySystem On ChipHardware ArchitectureNoc Synthesis FlowAutomatic ExecutionEngineeringNoc ArchitecturesEdge ComputingHigh-performance ArchitectureComputer EngineeringComputer ArchitectureSystems EngineeringNetwork On ChipComputer ScienceParallel ComputingManycore ProcessorSoc Design Productivity
The growing complexity of customizable single‑chip multiprocessors demands highly scalable communication infrastructure, as illustrated by the proliferation of network‑on‑chip architectures for SoC integration. Developing NoC‑based systems tailored to a specific application domain is essential for high‑performance, energy‑efficient customized solutions, and automating these design steps is highly desirable to increase SoC design productivity. The authors present Netchip, a synthesis flow that partitions development into topology mapping, selection, and generation, employs tools SUNMAP and xpipescompiler, and leverages the reusable, scalable xpipes library of parameterizable network building blocks to automatically instantiate application‑specific NoC architectures. Experimental case studies demonstrate the methodology’s powerful design‑space exploration capabilities.
The growing complexity of customizable single-chip multiprocessors is requiring communication resources that can only be provided by a highly-scalable communication infrastructure. This trend is exemplified by the growing number of network-on-chip (NoC) architectures that have been proposed recently for system-on-chip (SoC) integration. Developing NoC-based systems tailored to a particular application domain is crucial for achieving high-performance, energy-efficient customized solutions. The effectiveness of this approach largely depends on the availability of an ad hoc design methodology that, starting from a high-level application specification, derives an optimized NoC configuration with respect to different design objectives and instantiates the selected application specific on-chip micronetwork. Automatic execution of these design steps is highly desirable to increase SoC design productivity. This work illustrates a complete synthesis flow, called Netchip, for customized NoC architectures, that partitions the development work into major steps (topology mapping, selection, and generation) and provides proper tools for their automatic execution (SUNMAP, xpipescompiler). The entire flow leverages the flexibility of a fully reusable and scalable network components library called xpipes, consisting of highly-parameterizable network building blocks (network interface, switches, switch-to-switch links) that are design-time tunable and composable to achieve arbitrary topologies and customized domain-specific NoC architectures. Several experimental case studies are presented In the work, showing the powerful design space exploration capabilities of the proposed methodology and tools.
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