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A Nanowire Transistor for High Performance Logic and Terabit Non-Volatile Memory Devices
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2007
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Non-volatile MemoryEngineeringEmerging Memory TechnologyIntegrated CircuitsSemiconductor DeviceHigh Performance LogicNanoelectronicsMemory DeviceMemory DevicesNanowire TransistorNm Spherical NanowireDevice RotationElectrical EngineeringNanotechnologyComputer EngineeringMicroelectronicsApplied PhysicsSemiconductor MemoryRetention EnhancementBeyond Cmos
Silicon nanowire-FET (SiNAWI-FET) for high performance logic device with consideration of current direction effects and terabit non-volatile memory (NVM) device using an 8 nm SiNAWI-NVM with oxide/nitride/oxide (ONO) and omega-gate structure is reported for the first time. N-and P-channel SiNAWI-FET showed the highest driving current on (110)/<110> crystal orientation without device rotation, whereas most 3-dimensional NMOS report higher driving current on 45deg device rotation rather than 0deg. Utilizing an 7 nm spherical nanowire on the 8 nm SiNAWI-NVM with ONO structure, 1.7 V V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">T</sub> -window was achieved from 12 V/80 musec program conditions with retention enhancement.