A survey of circuit innovations in ferroelectric random-access memories

TLDR

Ferroelectric memories store binary data in a ferroelectric capacitor with transistors for access or amplification, and during read operations the analog voltage is sensed by a sense amplifier; reference‑voltage generation must be robust to process variations, and these memories share addressing and I/O with other RAMs but differ in data access, sensing, and topology. This survey reviews circuit innovations in ferroelectric memories across cell, sensing, and architecture levels, presenting six reference‑voltage generation methods (two novel) and nine memory architectures evaluated for speed, density, and power. The authors evaluate the six reference‑voltage techniques and nine architectures by comparing accuracy, area overhead, sensing complexity, speed, density, and power consumption.

Abstract

This paper surveys circuit innovations in ferroelectric memories at three circuit levels: memory cell, sensing and architecture. A ferroelectric memory cell consists of at least one ferroelectric capacitor, where binary data are stored, and one or two transistors that either allow access to the capacitor or amplify its contents for a read operation. Once a cell is accessed for a read operation, its data are presented in the form of an analog signal to a sense amplifier, where it is compared against a reference voltage to determine its logic level. The circuit techniques used to generate the reference voltage must be robust to semiconductor processing variations across the chip and the device imperfections of ferroelectric capacitors. We review six methods of generating a reference voltage, two being presented for the first time in this paper. These methods are discussed and evaluated in terms of their accuracy, area overhead and sensing complexity. Ferroelectric memories share architectural features such as addressing schemes and input/output circuitry with other types of random-access memories such as dynamic random-access memories. However, they have distinct features with respect to accessing the stored data, sensing, and overall circuit topology. We review nine different architectures for ferroelectric memories and discuss them in terms of speed, density and power consumption.