A 10-Gb/s eye-opening monitor IC for decision-guided adaptation of the frequency response of an optical receiver

Abstract

This paper presents a single-chip eye opening monitor IC for decision-guided optimization of the frequency response of an optical receiver. The IC provides an analog output voltage proportional to the horizontal eye opening of a data signal. The chip includes a delay-locked loop for automatic adjustment of the clock phase. It was designed in a 50-GHz-f/sub T/ SiGe bipolar technology and dissipates 4.95 W from a -5-V supply.