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Temperature-dependent bit-error rate of a clocked superconducting digital circuit
27
Citations
5
References
1999
Year
Temperature-dependent Bit-error RateElectrical EngineeringSuperconducting MaterialOptimal ControlVlsi DesignEngineeringClock RecoveryTiming AnalysisMixed-signal Integrated CircuitSuperconductivityComputer EngineeringMicroelectronicsSuperconducting DevicesRs LatchClocked Sfq CircuitBeyond CmosElectronic Circuit
We measured the bit-error rate (BER) of an RS latch, a clocked SFQ circuit. A digital error-detection circuit was used to detect BER in the range unity to 10/sup -13/; below 10/sup -7/, the circuit was operated with a 12 GHz on-chip clock. BER was measured as a function of control current; both positive and negative control current was applied, leading to two distinct modes of error incidence. The error function curves extrapolate to 10/sup -80/ for optimal control current at a temperature of 5.5 K. Measurements were repeated over the range 3-7 K. Comparison to theoretical error-function estimates of BER indicate that the noise is strictly thermal.
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