Backend low-k TDDB chip reliability simulator

Abstract

Backend low-k time-dependent dielectric breakdown degrades reliability of circuits with Copper metallization. We present test data and link it to a methodology to evaluate chip lifetime due to low-k time-dependent dielectric breakdown. Other failure mechanisms can be integrated into our methodology. We analyze several layouts using our methodology and present the results to show that the methodology can enable the designer to consider easy design modifications and their impact on lifetime, separate from the design rules.