A two-stage wake-up circuit for semi-passive RFID tag

Abstract

A two-stage wake-up circuit for semi-passive Radio Frequency Identification (RFID) tag is designed and implemented in SMIC 0. 18 µm CMOS technology. In order to prolong the tag's battery life, a novel two-stage wake-up strategy with self-calibration is proposed. Measurement results show that the wake-up circuit has no static power and is free of Process, Voltage and Temperature (PVT) variations.