IEEE Transactions on Communications · 1996 · 35 citations · 3 references
EngineeringComputer EngineeringElectrical EngineeringMicroelectronicsDigital Signal ProcessingFeedback LoopsFrequency ControlFrequency RegulationFrequency-domain AnalysisLimit CyclesGranularityLimit Cycle DynamicsLimit Cycle OscillationsPhase-locked Loop DesignPhase-locked Loops
The frequency of a digital phaselock loop (DPLL) is necessarily quantized. Feedback around the quantizing nonlinearity leads to a steady-state limit cycle. Properties of the limit cycle were obtained by computer simulation, and are reported here. Empirical formulas for guidance in DPLL design were developed.
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Theory and application of digital signal processing
T.N. Trick · Proceedings of the IEEE · 1975 · 1.9K citations
J.W. Mark · Proceedings of the IEEE · 1975 · 1.6K citations