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Closed-Form Expressions of 3-D Via Resistance, Inductance, and Capacitance
199
Citations
18
References
2009
Year
Numerical Analysis3D Ic ArchitectureElectrical EngineeringDielectric ThicknessEngineeringAdvanced Packaging (Semiconductors)Physical Design (Electronics)Interplane 3-D ViasComputer EngineeringClosed-form ExpressionsTransmission LineElectrical InsulationComputational ElectromagneticsElectronic PackagingMicroelectronicsCircuit AnalysisElectromagnetic Compatibility
Closed-form expressions of the resistance, capacitance, and inductance for interplane 3-D vias are presented in this paper. The closed-form expressions account for the 3-D via length, diameter, dielectric thickness, and spacing to ground. A 3-D numerical simulation is used to extract electromagnetic solutions of the resistance, capacitance, and inductance for comparison with the closed-form expressions, revealing good agreement between simulation and the physical models. The maximum error for the resistance, capacitance, and inductance is less than 8%.
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