FPGA based router for cognitive packet networks

Abstract

Cognitive packet networks are a neural network based intelligent networking concept. While the current software implementation of CPN has been shown to provide improved quality of service over traditional IP networks, the current algorithms do not lend themselves to hardware. The largest barrier is the decision making random neural network update algorithm. A proposed simplification and speed up of the RNN, and an implementation of a proof-of-concept CPN router on an FPGA are presented. It is shown that the simplified RNN update algorithm is seven times faster than the original algorithm, and provides a moderate increase in data rates for a typical flow