Design of Integrated Gate Driver With Threshold Voltage Drop Cancellation in Amorphous Silicon Technology for TFT-LCD Application

Abstract

A new integrated gate driver has been successfully designed and fabricated by amorphous silicon (a-Si) technology for a 3.8-in WVGA (800 × 480) TFT-LCD panel. With the proposed threshold voltage drop-cancellation technique, the output rise time of the proposed integrated gate driver can be substantially decreased by 24.6% for high-resolution display application. Moreover, the proposed noise reduction path between the adjacent gate drivers can reduce the layout area for slim bezel display. The transmittance brightness and contrast ratio of the demonstrated 3.8-inch panel show almost no degradation after the 500 h operation under 70 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C and -20 <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">°</sup> C conditions.