A Monolithic Dual 16-Bit D/A Converter

Abstract

A monolithic dual high-speed 16-bit D/A converter is described. In the binary weighted current network a dynamic current divider is used to obtain the required high accuracy of the six most significant bits without any adjustment procedure or trimming technique. To construct the ten least significant bits a new approach is used to construct the passive divider stage based on emitter sealing of transistors. As the bit switches are optimized for fast-settling and low-glitch current, both converters can be used without extra sample-and-hold or deglitcher circuitry at sampling frequencies up to 200 kHz. The converter has a differential linearity of 0.5 LSB over a temperature range of -20 to +70/spl deg/ C. The high linearity of the converter results in a distortion of 0.001 percent over the audio band. The chip is processed in a standard bipolar process and the die size is 3.8 X 5.5 mm/sup 2/.