2014 · 10 citations · 3 references
EngineeringComputer EngineeringElectrical EngineeringAnalog ElectronicsMicroelectronicsSemiconductor DevicesAnalog Integrated CircuitsCmos Circuit DesignDigital Integrated Circuit DesignDigital Integrated CircuitsDigital Signal ProcessingMixed-signal Integrated Circuit DesignAnalog-digital ConversionAnalog-to-digital ConversionAnalog-to-digital Converter DesignAnalog-to-digital ConvertersCmos Analog Integrated CircuitsDigital-to-analog Converter DesignDigital-to-analog ConvertersMultiplexer Design
A 9-bit 11GS/s current-steering (CS) digital-to-analog converter (DAC) is designed in 28nm FDSOI. The DAC uses two-times interleaving to suppress the effects of the main error mechanisms of CS DACs while its clock timing can be tuned by the back gates bias voltage of the multiplexer transistors. The DAC achieves higher than 50dB SFDR and less than −50dBc IM3 over Nyquist at a sampling rate of 11GS/s, occupying only 0.04mm2 and consuming 110mW from a single 1V supply.
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A 56GS/S 6b DAC in 65nm CMOS with 256×6b memory
Yuriy Greshishchev, D. Pollex, Shing-Chi Wang et al. · 2011 · 59 citations