2011 · 13 citations · 8 references
EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsCmos Circuit DesignComplementary Metal-oxide-semiconductor TechnologyIntegrated Circuit DesignNoiseNoise In Analog CircuitsRadio-frequency Integrated CircuitsLow-noise AmplificationLow-noise AmplifiersLow-power Cmos DesignNoise FigureNoise Figure AnalysisNoise Figure MeasurementPower GainUltra-low-power Cmos
This paper presents design guidelines for ultra-low power Low Noise Amplifier (LNA) design by comparing input matching, gain, and noise figure (NF) characteristics of common-source (CS) and common-gate (CG) topologies. A current-reused ultra-low power 2.2 GHz CG LNA is proposed and implemented based on 0.18 um CMOS technology. Measurement results show 13.9 dB power gain, 5.14 dB NF, and −9.3 dBm IIP3, respectively, while dissipating 140 uA from a 1.5 V supply, which shows best figure of merit (FOM) among all published ultra-low power LNAs.
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Ralf Brederlow, W. Weber, J. Sauerer et al. · IEEE Design & Test of Computers · 2001 · 121 citations