SoCWire: A Network-on-Chip Approach for Reconfigurable System-on-Chip Designs in Space Applications

Abstract

Configurable System-on-Chip (SoC) solutions based on state-of-the art FPGA have successfully demonstrated flexibility and reliability for scientific space applications like the Venus Express mission. Future high end payload applications (e.g. Solar Orbiter) demand high-performance on-board processing because of the discrepancy between extreme high data volume and low downlink channel capacity. Furthermore, in-flight reconfiguration ability enhances the system with re-programmable hardware and thus a maintenance potential. To achieve these advanced design goals a Reconfigurable System-on-Chip (RSoC) architecture is proposed supported by a flexible communication architecture. The flexibility for on-chip communication is covered by a dedicated Network-on-Chip (NoC) approach. The configurable System-on-Chip solution is introduced and the advantages are outlined. Additionally we present our newly developed NoC approach, System-on-Chip Wire (SoCWire) and outline its performance and the applicability for in-flight reconfigurable systems.