A new low-voltage charge pump circuit for PLL

Abstract

In this paper, a new low-voltage charge pump circuit is presented. Its simple and symmetric structure can provide more stable operation. The proposed charge pump circuit is composed of a pair of symmetric pump circuits and a wide-swing current mirror circuit. To ensure more accurate charge pumping operation, a weak pull-up circuit is inserted in the symmetric pump circuit. The new charge pump circuit has wide output range and no jump phenomenon. It has been designed by using the MOSIS 0.35 /spl mu/m double-poly triple-metal CMOS technology and simulated by HSPICE. The power consumption of the proposed charge pump circuit is 0.03 mW at a supply voltage of 1.5 V. The circuit can be widely used in either single-ended or fully differential phase-locked loop structures.