Automatic Identification of Defect Patterns in Semiconductor Wafer Maps Using Spatial Correlogram and Dynamic Time Warping

Abstract

A wafer map is a graphical illustration of the locations of defective chips on a wafer. Defective chips are likely to exhibit a spatial dependence across the wafer map, which contains useful information on the process of integrated circuit (IC) fabrication. An analysis of wafer map data helps to better understand ongoing process problems. This paper proposes a new methodology in which spatial correlogram is used for the detection of the presence of spatial autocorrelations and for the classification of defect patterns on the wafer map. After the detection of spatial autocorrelation based on our proposed spatial randomness test using spatial correlogram, the dynamic time warping algorithm which provides nonlinear alignments between two sequences to find optimal warping path is adopted for the automatic classification of spatial patterns based on spatial correlogram. We also develop generalized join-count (JC)-based statistics and then propose a procedure to determine the optimal weights of JC-based statistics. The proposed method is illustrated using real-life examples and simulated data sets. The experimental results show that our method is robust to random noise and has a robust performance regardless of defect location and size.