Publication | Closed Access
MSI InP/InGaAs DHBT technology: beyond 40 Gbit/s circuits
35
Citations
6
References
2003
Year
Unknown Venue
Electrical EngineeringEngineeringRf SemiconductorAdvanced Packaging (Semiconductors)Electronic EngineeringCurrent GainApplied PhysicsBias Temperature InstabilityComputer EngineeringGbit/s CircuitsStandard DeviationElectronic CircuitMicroelectronicsOptoelectronicsSemiconductor DeviceCurrent Results
We present current results obtained on IC-oriented OPTO+ InP DHBT lab technology. Transistors with 180/210 GHz F/sub t//F/sub max/, current gain of 50 and BV/sub ce0/=7V are currently fabricated with >99% fabrication yield. Uniformity measurements show a standard deviation on F/sub t/ and F/sub max/ lower than 2% and lower than 5% on all investigated parameters. In a second part DHBT-specific modelling issues are discussed. A 68 Gbit/s selector has been obtained and a 40 Gbit/s master-slave D-type flip-flop (MS-DFF) has been reproducibly fabricated with >50% functional yield using this technology.
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