MSI InP/InGaAs DHBT technology: beyond 40 Gbit/s circuits

Sylvain Blayac, M. Riet, J.L. Benchimol, P. Berdaguer, Myrtil L. Kahn, A. Pinquier, E. Dutisseuil, J. Moulu, Abed-Elhak Kasbari, A. Konczykowska,

2003 · 35 citations · 6 references

Concepts

Abstract

We present current results obtained on IC-oriented OPTO+ InP DHBT lab technology. Transistors with 180/210 GHz F/sub t//F/sub max/, current gain of 50 and BV/sub ce0/=7V are currently fabricated with >99% fabrication yield. Uniformity measurements show a standard deviation on F/sub t/ and F/sub max/ lower than 2% and lower than 5% on all investigated parameters. In a second part DHBT-specific modelling issues are discussed. A 68 Gbit/s selector has been obtained and a 40 Gbit/s master-slave D-type flip-flop (MS-DFF) has been reproducibly fabricated with >50% functional yield using this technology.

References

6