2006 · 18 citations · 4 references
EngineeringElectrical EngineeringAnalog ElectronicsLow-power DesignMicroelectronicsAnalog Integrated CircuitsCmos Circuit DesignDigital Integrated CircuitsDistortion AnalysisLow-power Digital Circuit DesignMixed-signal Integrated Circuit DesignAnalog-to-digital ConversionAnalog-to-digital Converter DesignAnalog-to-digital Converter IntegrationCalibration Techniques For Analog CircuitsDigital-to-analog Converter Design
A signal-dependent dithering concept is developed to measure the multiplying DAC (MDAC) gain error of a 1.5b/stage pipelined ADC in background. A 15b, 20MS/s prototype ADC exhibits SFDR and THD of 98 and -92dB with 14.5MHz input. The chip fabricated in 0.18mum CMOS occupies 2.3 times 1.7mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , and consumes 285mW at 1.8V
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An 8b 80MSample/s pipelined ADC with background calibration
Ming Jun, S.H. Lewis · 2002 · 24 citations