E. Siragusa

A digitally enhanced 1.8-V 15-bit 40-MSample/s CMOS pipelined ADC

E. Siragusa, Ian Galton · IEEE Journal of Solid-State Circuits · 2004 · 209 citations

Engineering, Electrical Engineering, Analog Electronics +16

Gain error correction technique for pipelined analogue-to-digitalconverters

E. Siragusa, Ian Galton · Electronics Letters · 2000 · 89 citations

Engineering, Electrical Engineering, Analog Electronics +11

A digitally enhanced 1.8 V 15 b 40 MS/s CMOS pipelined ADC

E. Siragusa, Ian Galton · 2004 · 42 citations

Engineering, Electrical Engineering, Analog Electronics +16

A 16b 80MS/s 100mW 77.6dB SNR CMOS pipeline ADC

Janet Brunsilius, E. Siragusa, Steve Kosic et al. · 2011 · 39 citations

Engineering, Electrical Engineering, Analog Electronics +12

A delta-sigma PLL for 14-b, 50 kSample/s frequency-to-digital conversion of a 10 MHz FM signal

Ian Galton, W. Huff, Paolo Carbone et al. · IEEE Journal of Solid-State Circuits · 1998 · 23 citations

Engineering, Electrical Engineering, Analog Electronics +16