Design and optimization of high-voltage CMOS devices compatible with a standard 5 V CMOS technology

Abstract

High-voltage n- and p-MOSFETs fully compatible with a standard 5 V CMOS technology have been designed, optimized, and fabricated. No process changes are required. By modifying the logical equations generating one of the physical masks from the design masks, a p-type buffer region for the high-voltage p-MOS was easily implemented. This modification does not affect the low-voltage part of the circuits. These high-voltage devices have been used successfully as output drivers in semicustom arrays, and as building blocks for custom low- to high-voltage output interfaces. Aspects of reliability, device protection, and circuit design techniques are addressed.