VCO Design With On-Chip Calibration System

Abstract

This paper presents a low-supply voltage integrated CMOS voltage-controlled oscillator (VCO) with an on-chip digital VCO calibration control system. The VCO utilizes various state-of-the-art design methods to achieve low phase noise. The calibration system includes a novel high-speed digital divide by two circuit and a counter running on 1-GHz input to enable on-chip frequency measurement. An arithmetic unit and algorithms to perform the calibration are implemented using on-chip logic. Two different types of calibration methods have been implemented and measured in order to compare the proposed VCO gain optimization method with more conventional type of VCO calibration. The measurements show that the VCO design has phase noise from <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$-$</tex> 120.5 dBc/Hz to <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$-$</tex> 118.7 dBc/Hz @ 400-kHz offset, measured over the frequency range from 1.67 to 1.93 GHz. The proposed VCO gain optimization method is capable of reducing the <tex xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">$K_ VCO$</tex> peak-to-peak variation of the presented VCO design from 54.4% to 29.8% in DCS1800 and PCS1900 GSM transmission bands when compared to the conventional type of calibration method.