COSYN

Abstract

Hardware-software co-synthesis is the process ofpartitioning an embedded system specification into hardware andsoftware modules to meet performance, power and cost goals. Inthis paper, we present a co-synthesis algorithm which starts withperiodic task graphs with real-time constraints and produces a low-costheterogeneous distributed embedded system architecturemeeting the constraints. The algorithm has the following features:1) it allows the use of multiple types of processing elements (PEs)and inter-PE communication links, where the links can take variousforms (point-to-point, bus, local area network (LAN), etc.), 2) itsupports both concurrent and sequential modes of communicationand computation, 3) it allows both preemptive and non-preemptivescheduling, 4) it employs the concept of an association array totackle the problem of multi-rate systems (which are commonlyfound in multimedia applications), 5) it uses a scheduler based ondynamic deadline-based priority levels for accurate performanceestimation of a co-synthesis solution, 6) it uses a new taskclustering technique which takes the dynamic nature of the criticalpath, and the existence of multiple critical paths in the task graphinto account, and 7) if desired, it also optimizes the architecture forpower consumption (we are not aware of any other co-synthesisalgorithm that optimizes power). Application of the proposedalgorithm to examples from the literature and real-life telecomtransport systems shows its efficacy.