A Compact Model for Single Event Effects in PD SOI Sub-Micron MOSFETs

Abstract

This paper presents a compact model implemented in Verilog-A for partially depleted (PD) silicon-on-insulator (SOI) sub-micron MOSFETs, which allows for describing the Single Events Effects (SEE) produced by heavy ions. This Verilog-A module can be coupled with Spice simulator in order to have faster (time-efficient) circuit simulations with good agreement. Due to the physical aspects considered in the model, better flexibility than the standard current source method is achieved. Experimental data for 0.15 and <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">${0.13}~\mu{\rm m}$</tex></formula> technology nodes are used to validate our model. Robustness of the model to reproduce experimental results is demonstrated on three data-sets available in literature: 1) single event transient current in stand-alone n-FET from <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex Notation="TeX">${0.13}~\mu{\rm m}$</tex></formula> PD SOI process hinted by heavy ions at different positions; 2) SEE propagation in path delay with ten inverters realized in <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">${0.13}~\mu{\rm m}$</tex></formula> PD SOI process; 3) 6T SRAMs with active element delay on SEE-rad-hardened <formula formulatype="inline" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex Notation="TeX">$0.15~\mu{\rm m}$</tex></formula> PD SOI process.