Limitations of quasi-static capacitance models for the MOS transistor

Abstract

This letter compares the Meyer [1] and Ward [2,3] quasi-static, intrinsic capacitance formulations for the MOS transistor to an exact, non-quasi-static, incremental analysis of a simplified device. This analysis yields an incremental admittance matrix for the device whose terms are ratios of power series. The Meyer and Ward models are shown to be approximations to this exact solution. Experimental admittance versus frequency data are presented which show good agreement with this theory. The high-frequency modeling of the Ward and Meyer formulations are compared to the data above, and the limitations of these models are discussed.