A simple, precise, and low jitter delay/gate generator

Abstract

The generator of precise delay over the range of 0–650 μs is described. The delay is selected with 10 ps resolution and its jitter is below 8 ps (rms) for delays up to 10 μs. The generator was designed as a complementary metal-oxide-semiconductor programmable logic device driven by a signal generator. Three output pulses are generated: START, STOP, and GATE, all with the amplitude of 2.3 V and the switching times below 500 ps.