Publication | Closed Access
In-place fabrication of nanowire electrode arrays for vertical nanoelectronics on Si substrates
21
Citations
32
References
2007
Year
EngineeringNanoporous MaterialNanowire Electrode ArraysNanocomputingSilicon On InsulatorPlasma ProcessingChemical EngineeringNanoelectronicsVertical Nanowire ArraysNanolithography MethodIn-place FabricationMaterials ScienceElectrical EngineeringNanotechnologyPd Nanowire ElectrodesSemiconductor Device FabricationElectrochemical ProcessVertical NanoelectronicsNanomaterialsApplied PhysicsNano Electro Mechanical SystemVertical Arrays
Vertical arrays of Pd nanowire electrodes with controllable and reproducible diameters and lengths are fabricated using a porous anodic alumina (PAA) template supported on a metallized Si substrate. The process described here employs a hydrogen plasma to penetrate the alumina pore barrier oxide prior to electrodeposition, enabling direct electrical contact with the back electrode metallization, thereby eliminating the need for electrochemical processing with high current or voltage pulsing that can lead to delamination or voiding. Electrical characteristics reveal Ohmic contact between the Pd nanowires and the underlying Ti conductive layer for samples with a range of pore diameters from 30to130nm. This process enables both the fabrication of vertical nanowire arrays on prefunctionalized substrates, as well as the in situ fabrication of contacts to semiconductor nanodevices using a thin-film nanowire array. The hydrogen plasma step is particularly well suited to the fabrication of carbon nanotube arrays in PAA by plasma-enhanced chemical vapor deposition.
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