Security Risks Posed by Modern IC Debug and Diagnosis Tools

Abstract

Silicon debug and diagnosis (SDD) has successfully combined recent developments of IC Failure Analysis (FA) techniques in order to have local physical interaction with the circuit function down to nano scale. These techniques, mainly optical interactions applied through chip backside, are assisted by a revolutionary Focused Ion Beam (FIB) backside preparation technique that keeps the chip fully functional while leaving sub micron thickness of Si substrate on an area large enough to call it semi-global. With such a treatment, any physical interaction, even electrical probing to any node, is possible through chip backside. On top of that, the performance of the devices can be modulated in situ with this FIB process. All these FA and SDD innovations open up a new world of hardware attack processes, accessible in FA labs world wide on an hourly basis, that security sensitive ICs need to be protected against.