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A behavioral-level HDL description of SFQ logic circuits for quantitative performance analysis of large-scale SFQ digital systems

Hardware SecuritySfq Logic CircuitsEngineeringVlsi DesignHardware Verification LanguageVlsi ArchitectureBehavioral-level Hdl DescriptionComputer EngineeringComputer ArchitectureSystems EngineeringFormal MethodsQuantitative Performance AnalysisHardware Description LanguageComputer ScienceDigital Circuit DesignParallel ComputingHardware Description Languages