2011 · 21 citations · 4 references
EngineeringComputer EngineeringElectrical EngineeringDigital CommunicationMicroelectronicsWireless CommunicationsChannel EstimationDigital Signal ProcessingMillimeter-wave CommunicationsWireless NetworksDigital Signal Processing Block ArchitectureMillimeter-wave Channel EstimationParallel ProcessingParallel Signal Processing
This paper presents a SC-FDE/OFDM MMSE equalizer for 60GHz wireless communications in 65nm CMOS process. By applying a 4-parallel signal processing architecture, the 512pt FFT/IFFT processor, the Golay channel estimator, and the MMSE equalizer are all clocked at 1/4 input symbol sampling rate. Occupying a core area of 1.12mm <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> , the symbol sampling rate at 1V supply is 1.46GS/s. With 16QAM modulation, its throughput is 5.84Gb/s while consuming 124mW in the SC-FDE mode and 88mW in the OFDM mode. With a 1.2V supply, it achieves a symbol sampling rate of 1.76GS/s with a 7Gb/s throughput while consuming 208mW in the SC-FDE mode and 148mW in the OFDM mode.
4
VLSI signal processing systems
Computer-Aided Design · 1986 · 89 citations
Engineering, Computer Engineering, Electrical Engineering +12