A high-performance, high-density 28nm eDRAM technology with high-K/metal-gate

Abstract

This paper presents industry's smallest 0.035 um <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> high performance embedded DRAM cell with cylinder-type Metal-Insulator-Metal (MIM) capacitor and integrated into 28 nm High-K Metal Gate (HKMG) logic technology. This eDRAM memory features an HKMG CMOS compatible (low-thermal low-charging process) high-K MIM capacitor with extreme low leakage (<;0.1fA/cell). Access transistor with HKMG shows excellent driving capability (>;50uA/cell) with <;1fA/cell leakage in 28 nm cell and <;3fA/cell in 20 nm cell (0.021um <sup xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">2</sup> ). We demonstrate first functional silicon success of 28nm eDRAM macro. 600/550 MHz operating frequency is achieved at typical/worse cases.