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Concurrent Error Detection in a Bit-Parallel Systolic Multiplier for Dual Basis of GF(2m)

Bit-parallel Systolic MultiplierMassively-parallel ComputingEngineeringConcurrent Error DetectionParallel Complexity TheoryParallel ProcessingComputer ArchitectureComputer EngineeringParallel ImplementationParallel ProgrammingComputer ScienceParallel ComputingData-level ParallelismSignal ProcessingDual Basis