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Low Temperature Poly-Si TFTs Using Solid Phase Crystallization of Very Thin Films and an Electron Cyclotron Resonance Chemical Vapor Deposition Gate Insulator
57
Citations
6
References
1991
Year
EngineeringChannel Si LayerIntegrated CircuitsThin Film Process TechnologySilicon On InsulatorLow TemperatureNanoelectronicsVery Thin FilmsSolid Phase CrystallizationThin Film ProcessingMaterials ScienceElectrical EngineeringSemiconductor Device FabricationMicroelectronicsElectronic MaterialsApplied PhysicsThin Film DevicesThin FilmsChemical Vapor Deposition
Low temperature ( T ≦600°C) polycrystalline silicon thin film transistors (poly-Si TFTs) have been fabricated by solid phase crystallization (SPC) of amorphous silicon (a-Si) films deposited by low pressure chemical vapor deposition (LPCVD). These TFTs are distinguished by the very thin nature of the channel Si layer (25 nm) and the use of an SiO 2 gate insulator deposited by electron cyclotron resonance chemical vapor deposition (ECR-CVD). The present process eliminates the need for hydrogenation and produces mobilities greater than 20 cm 2 /V·s and on/off current ratios greater than 10 7 .
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