EngineeringComputer ScienceComputer SystemsComputer ArchitectureComputer NetworksInterconnection NetworksHeterogeneous System ArchitectureInterconnect ArchitectureInterconnect DesignInterconnect TechnologyMemory Subsystem DesignProcessor MicroarchitectureMemory InterconnectsPerformance RequirementsVon Neumann Architecture
As the level of complexity of digital systems increases, the problem of interconnecting subunits is receiving increasing attention. We are reaching the point where processing speed cannot be further improved through the use of faster componentry. Further speed-up of systems will most likely result from changes in the organization and structure of hardware, rather than by raw circuit improvements. Another factor increasing the complexity of systems is the arrival of cheap, powerful LSI microcomputers which allow system construction involving a plurality of processors connected together to perform a specific task. Restructurable system concepts are also very promising, but require extensive amounts of interconnective capability. Thus, bus structures are attracting considerable attention. This paper focuses on a small segment of the general bus structure problem; namely, interconnection (permutation, sorting, etc.) networks.
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