A CMOS microprocessor for telecommunications applications

Abstract

THIS REPORT will cover an 8-bit microprocessorX fabricated with a silicon-gate CMOS technology and packaged in a 40-pin DIP. It embodies several architectural innovations and an extended instruction set affording exceptional computing power. Although the fabrication technology is CMOS, it was found that the use of non-complementary structures for certain portions of the logic resulted in a device with the functional density of NMOS, but with power dissipation and internal noise margins approaching that of CMOS.