Publication | Closed Access
Joint rewriting and error correction in write-once memories
26
Citations
21
References
2013
Year
Unknown Venue
Hardware SecurityFlash MemoriesMemory ArchitectureStorage (Memory)EngineeringNon-volatile MemoryBinary Symmetric ChannelFlash MemoryPolar CodesFormal MethodsComputer ArchitectureMemoryComputer EngineeringComputer ScienceParallel ComputingError Correction CodeJoint RewritingError Correction
Both rewriting and error correction are important technologies for non-volatile memories, especially flash memories. However, coding schemes that combine them have been limited. This paper presents a new coding scheme that combines rewriting and error correction for the write-once memory model. Its construction is based on polar codes, and it supports any number of rewrites and corrects a substantial number of errors. The code is analyzed for the binary symmetric channel, and experimental results verify its performance. The results can be extended to multi-level cells and more general noise models.
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