Using advanced compiler technology to exploit the performance of the Cell Broadband Engine™ architecture

TLDR

Game applications and other numerically intensive workloads have driven the development of novel architectures, and the increasing processor complexity creates a parallel need for sophisticated compiler technology. The paper aims to develop compiler techniques that exploit SPE performance and enable heterogeneous parallelism while improving programmability without sacrificing high performance. The authors use the Cell Broadband Engine architecture, featuring a PowerPC core and eight SPEs, and implement compiler techniques such as SPE optimization, automatic code generation, single‑source parallelization, and partitioning. The compiler techniques improve performance on the Cell Broadband Engine, demonstrating effective exploitation of SPEs and heterogeneous parallelism.

Abstract

The continuing importance of game applications and other numerically intensive workloads has generated an upsurge in novel computer architectures tailored for such functionality. Game applications feature highly parallel code for functions such as game physics, which have high computation and memory requirements, and scalar code for functions such as game artificial intelligence, for which fast response times and a full-featured programming environment are critical. The Cell Broadband Engine™ architecture targets such applications, providing both flexibility and high performance by utilizing a 64-bit multithreaded PowerPC® processor element (PPE) with two levels of globally coherent cache and eight synergistic processor elements (SPEs), each consisting of a processor designed for streaming workloads, a local memory, and a globally coherent DMA (direct memory access) engine. Growth in processor complexity is driving a parallel need for sophisticated compiler technology. In this paper, we present a variety of compiler techniques designed to exploit the performance potential of the SPEs and to enable the multilevel heterogeneous parallelism found in the Cell Broadband Engine architecture. Our goal in developing this compiler has been to enhance programmability while continuing to provide high performance. We review the Cell Broadband Engine architecture and present the results of our compiler techniques, including SPE optimization, automatic code generation, single source parallelization, and partitioning.