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Non‐volatile Ferroelectric Poly(vinylidene fluoride‐<i>co</i>‐trifluoroethylene) Memory Based on a Single‐Crystalline Tri‐isopropylsilylethynyl Pentacene Field‐Effect Transistor

145

Citations

30

References

2009

Year

TLDR

The authors develop a nonvolatile ferroelectric memory based on an organic thin‑film transistor that uses a single‑crystal tri‑isopropylsilylethynyl pentacene (TIPS‑PEN) as the active channel. They fabricate a bottom‑gate OTFT with a thin P(VDF‑TrFE) gate insulator and a one‑dimensional ribbon‑type TIPS‑PEN single crystal grown by solvent‑exchange, then thermally treat the interface to optimize contact, and seed‑solution deposition on micropatterned surfaces enables array fabrication. The resulting device exhibits a stable source‑drain current modulation with an ON/OFF ratio hysteresis exceeding 10³, retains data for over 5×10⁴ s in ambient conditions with an interlayer, and remains environmentally stable for more than 40 days without passivation.

Abstract

Abstract A new type of nonvolatile ferroelectric poly(vinylidene fluoride‐ co ‐trifluoroethylene) (P(VDF‐TrFE)) memory based on an organic thin‐film transistor (OTFT) with a single crystal of tri‐isopropylsilylethynyl pentacene (TIPS‐PEN) as the active layer is developed. A bottom‐gate OTFT is fabricated with a thin P(VDF‐TrFE) film gate insulator on which a one‐dimensional ribbon‐type TIPS‐PEN single crystal, grown via a solvent‐exchange method, is positioned between the Au source and drain electrodes. Post‐thermal treatment optimizes the interface between the flat, single‐crystalline ab plane of TIPS‐PEN and the polycrystalline P(VDF‐TrFE) surface with characteristic needle‐like crystalline lamellae. As a consequence, the memory device exhibits a substantially stable source–drain current modulation with an ON/OFF ratio hysteresis greater than 10 3 , which is superior to a ferroelectric P(VDF‐TrFE) OTFT that has a vacuum‐evaporated pentacene layer. Data retention longer than 5 × 10 4 s is additionally achieved in ambient conditions by incorporating an interlayer between the gate electrode and P(VDF‐TrFE) thin film. The device is environmentally stable for more than 40 days without additional passivation. The deposition of a seed solution of TIPS‐PEN on the chemically micropatterned surface allows fabrication arrays of TIPS‐PEN single crystals that can be potentially useful for integrated arrays of ferroelectric polymeric TFT memory.

References

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