Low thermal resistance GaN-on-diamond transistors characterized by three-dimensional Raman thermography mapping

Abstract

In order to achieve ultra-high radio frequency output power densities in GaN-based transistors new thermal management solutions must be developed for efficient heat extraction, including the use of high thermal conductivity substrates. Integration of GaN devices with the highest thermal conductivity material available, diamond, instead of the standard GaN-on-SiC, can lead to a substantial reduction in device thermal resistance. Current GaN-on-diamond transistors are shown to result in a 40% reduction in peak channel temperature when benchmarked against equivalent GaN-on-SiC transistors, with the potential for even further reductions through optimization. In order to understand the contribution of substrate and GaN/substrate interface to the device thermal resistance, a 3D Raman thermography mapping and modelling approach has been developed. The GaN/diamond interface thermal resistance is found to have the largest contribution to the thermal resistance of current GaN-on-diamond devices.