Nanoscale CMOS for mm-Wave Applications

Abstract

Aggressive technology scaling of CMOS has culminated in a low-cost high volume commercial process technology with F <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">t</sub> > 150 GHz and F <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">max</sub> > 200 GHz. This paper discusses the key trends in CMOS scaling that have led to this level of performance and attempts to predict the performance down to 45 nm. The design of active and passive components in CMOS for power gain and low noise are discussed in detail and unique features of CMOS technology are highlighted. Experimental results derived from a 60 GHz amplifier in 90 nm CMOS and a complete 60 GHz front-end receiver in 130 nm CMOS are reported.