Mechanism of negative-bias temperature instability in polycrystalline-silicon thin film transistors

Abstract

It is found that 0.1 V-order threshold voltage shift (Vth shift) takes place in polycrystalline-silicon thin film transistors during negative-bias temperature stress (−BT stress), while the Vth shift in the case of positive-bias temperature stress is negligibly small. The Vth shift caused by −BT stress has an exponential dependence on the stress gate bias and reciprocal of temperature. Moreover, it also has a close relation with the grain size of poly-Si films and the hydrogenation process. However, it is independent of the gate insulator materials. Some models previously proposed for amorphous silicon TFTs could not explain these results. A new model is proposed based on a reaction between hydrogen and the SiO2 network at and near the poly-Si/SiO2 interface to clarify the mechanism and for consistent interpretation of the experimental results. Furthermore, the model has been verified qualitatively.