Noise-induced error rate as limiting factory for energy per operation in digital ICs

Abstract

Due to the steady progress in computer technologies over the past years, the physical limits of the energy required per logical operation are assuming increased practical significance. Whereas earlier studies have considered only the elementary energies (e.g., kT, hv) or the power consumption during gate switching, the present work takes account of the random errors induced in an idealized gate by noise. The dependence of the minimum energy W/SUB I/ on the permissible error rate A is calculated for thermal noise. The result obtained, W/SUB I//spl ap/3.9 kT in (5A)/SUP -1/ for 10/SUP -7/>A>10/SUP -23/, is discussed regarding other limits in semiconductor circuits.